β: This English translation is in beta — the Traditional-Chinese original is the authoritative version.
Injection-Locked Frequency Division (ILFD): M:N Sub-/Super-Harmonic Locking and Design
Prerequisites: paper_004 (the original, fully worked derivation of [P4] Eq.(28)-(30), p.2129 — this page is a teaching summary and extension of it), fourier_series_of_isf (the ISF's Fourier coefficients and symmetry table, the skeleton for this page's payoff) | Next: subharmonic_injection (the dual story: sub-harmonic injection / multipliers), injection_locking_noise (noise shaping of a locked oscillator, whose framework this page's last section borrows)
What this page answers:
- Why use an injection-locked frequency divider (ILFD) instead of a digital divider?
- Where does the ÷ lock-range formula come from, and which ISF harmonic sets it?
- Why can a differential, half-wave-symmetric oscillator not divide by 2 in the first place? How do you design around it?
- How should you account for the phase noise of a divided output — a clean , or something else?
Physical intuition (the punchline first): an ILFD is not a "division circuit" — it is an oscillator that already runs at , and the injection current gives its phase a small tug once per oscillation cycle, locking it to exactly of the input. How hard that tug pulls depends on how much content the oscillator's own ISF has at its -th harmonic — this is the first place on this site where [P1] Eq.(12)'s Fourier expansion is genuinely used as a design knob: the ISF's harmonics don't just decide how noise folds back onto the carrier — they also decide whether the divider locks at all.
Why injection-locked division instead of a static divider
High-speed local-oscillator chains (e.g., the first divider stage in an mm-wave PLL) typically choose between:
- A static digital divider (CML latches, TSPC/D-flip-flop chains; the ÷2 section of quadrature_and_coupled_oscillators already covers this route): every stage must toggle correctly at the full input rate, so dynamic power scales up with input frequency and the process needs comfortable switching margin at that frequency — the closer the input frequency sits to the process limit, the steeper the power and reliability cost.
- An ILFD (this page's subject): fundamentally an oscillator that runs at its own (not ); it only needs an injection current, much smaller than its own oscillation amplitude, to "hold" its phase — it never has to toggle logic at the full rate, only oscillate at its own native and let the injection path (often just a capacitor or a small transistor window, not a full toggling stage) tolerate . This typically lets an ILFD run cheaper on power and reach higher frequencies as the input approaches the process limit — which is why it is popular as the front divider stage in mm-wave PLLs.
Honesty note: the above is standard analog/RF design lore (external knowledge, not a quantitative result from any of the 5 site PDFs); [P4] never gives a power comparison between an ILFD and a static divider. This section is qualitative reasoning only. A quantitative comparison would need to cite a specific process/topology paper (TODO: unverified). What follows is the rigorous math [P4] does give: whether an ILFD locks, and how wide.
The M:N generalized averaging equation: how the ISF's -th harmonic gets "grabbed"
[P3]'s generalized Adler equation only handles an injection frequency (fundamental locking). [P4] Sec. IV (Eq.(28)-(30), p.2129, verified against the original PDF on this site; see paper_004 for the complete step-by-step version) generalizes this to an arbitrary rational frequency ratio: under lock, ( coprime positive integers). ILFD is the special case (output , i.e., division); is the injection-locked frequency multiplier (multiplication). The derivation below is compressed to three steps; see [paper_004] for the full version.
Step 1 (re-define the relative phase, Eq.(28)):
is the oscillator's total phase [rad], and is the slowly varying phase relative to the injection clock [rad]. A ÷2 ILFD takes : inject at , and the oscillator runs at .
Step 2 (time-synchronous average over an window, Eq.(29)):
The window is (not ) because: within the window the injection waveform completes full cycles, and the ISF's argument advances by , i.e., full cycles — both are integer numbers of cycles, which is exactly what makes the averaging clean.
Step 3 (term-by-term averaging — only the resonant harmonic survives, giving Eq.(30)): take and a sinusoidal injection , and expand as a phasor Fourier series (matching [P1] Eq.(12): , units rad/C). Multiplying term by term and applying the product-to-sum identity, every term except the difference-frequency term (whose frequency is exactly 0) completes an integer number of cycles over the window and averages exactly to zero — this is an identity, not "approximately small" (lab_37 below verifies it numerically to ). The one surviving term:
Reading it: only the oscillator's ISF -th harmonic responds to injection at the -th superharmonic — not the fundamental , and not any other harmonic. ÷2 uses (i.e., ); ÷3 uses (i.e., ).
Lock range: — carried by the ISF's -th harmonic
Locking has a stable solution (, on the output frequency axis). [P4] p.2130, verbatim: "which can be calculated from (30) to be ":
Three pieces of physics you can read off immediately ([P4] p.2129-2130, verified):
- The division ratio does not appear directly in the formula — it only selects which harmonic is used; the ÷2 and ÷3 lock ranges fall on one and the same line (see lab_37 panel (b) below).
- is reckoned on the output frequency axis; converted to the injection-frequency axis, the lockable window is wide.
- has period ⟹ there are stable locked phases spaced apart that are mutually indistinguishable — a ÷ output has possible phase startpoints (output phase ambiguity), which must be handled separately for multi-phase clocking.
Example (÷2 ILFD: 10 GHz in, 5 GHz out, canonical values, replayed from [paper_004]): GHz, pC, a sinusoidal injection of mA at GHz, and ISF second harmonic .
- rad/C.
- rad/s.
- MHz (only of ); the lockable window on the injection-frequency axis is MHz.
- Dimension check: A rad/C rad/s ✓. Weak-injection check: mA ([P4] footnote 11, p.2130), ⟹ the first-order linear model applies.
One-line Python:
0.5*0.5e-3*0.5/1e-12→ .
A half-wave-symmetric ISF cannot divide by 2 (the payoff)
Look back at the symmetry table in Step 7 of fourier_series_of_isf: half-wave symmetry ⟹ the even harmonics . Substitute into : the ÷2 lock range is identically zero — to first order, no matter how large you make , an injection at simply will not lock.
This is the same symmetry table telling two different stories: on the phase-noise side (white_noise_to_phase_noise) it's good news — noise near does not fold back onto the carrier; on the ILFD side it's bad news — symmetry is a double-edged sword. An ideal differential LC VCO's differential output nodes are exactly this case (). The design way out is to change the injection node — the ISF is "one curve per injection node" (as in [P1]); differential outputs are symmetric, but certain internal nodes are naturally asymmetric — the next section covers this in detail.
Numerical verification: lab_37 (unaveraged-ODE sweeps + harmonic maps)
lab_37 integrates the unaveraged instantaneous equation directly (verifying the already-averaged Eq.(30) with Eq.(30) itself would be circular):